The subject matter of the present disclosure relates generally to a phase change memory and switch (PCMS) memory and, particularly, to method and apparatus to manage drift in a PCMS memory device.
Phase change memory (PCM) devices use phase change materials which are materials that may be electrically switched between a generally amorphous and a generally crystalline state, as an electronic memory. Typical PCM materials used for memory applications include multi-component chalcogenides, such as Ge2Sb2Te5 (GST), which undergo reversible and rapid amorphous-to-crystalline phase change under an electrical field. The markedly different amorphous and crystalline state resistances are used as the two memory states, “0” (RESET) and “1” (SET). The state of a phase change material is also non-volatile. Therefore, when the memory is set in a state representing a resistance value, that value is retained until reprogrammed, even if power is turned off. A scalable and stackable non-volatile PCMS device can be built from memory cells by layering a PCM storage element and an Ovonic threshold switch (OTS). These vertically integrated memory cells can be embedded in a cross-point array stacked on top of a CMOS circuit for decoding, sensing, and logic function. PCM materials are known to show spontaneous changes, or drift, in the measurable device parameters (such as threshold voltage and resistance) used for recording and reading the PCM information. Therefore, drift management is a consideration for a PCMS memory device.